GE DS200TCDAG1B Digital I/O Board

Description

GE DS200TCDAG1B Digital I/O Board
Description:
DS200TCDAG1B is GE Mark V series board. It is a Digital I/O Board (TCDA), successor of DS200TCDAG1A, located in the digital I/O cores <O11>,<051> and<Q21> if present TCDA processes digital contact input signals from the DTBA andDTBB terminal boards and contact output (relay/solenoid) signals from the two TCRA boards. The signals are transmitted over the IONET to the TCOC board in<R1>,<R2> if<021> is installed and the CTBA terminal board in <R5>.
Hardware. There are eight hardware jumpers on the DS200TCDAG1B board. Jl and J8 are forfactory test. J2 and J3 are for IONET termination resistors. J4, J5. and J6 are used to set up the IONET ID for the board. J7 is the stall timer enable. Refer to Appendix A and the hardware jumper screen on the operator interface for information on the hardware jumper settings for this board.
Software. DS200TCDAG1B I/O configuration constants for the contact input inversions are entered in the I/O Configuration Editor located on the HMI as described below.

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