9200-06-01-10-00 Reads or writes a segment of data in the cache

A cache miss is a failed attempt to read or write a piece of data in the cache, which causes longer delays in the main memory access. There are three types of cache misses: instruction read misses, data read misses, and data write misses.

A cache read that misses the slave security instruction cache usually results in the greatest latency because the processor, or at least the executing thread, must wait (stop) until the instruction is retrieved from main memory. a missed cache read from A data cache usually results in a smaller delay because instructions that do not depend on a cache read can be issued and continue executing until the data is returned from main memory and dependent instructions can resume execution. Cache write misses a Data cache usually results in the shortest latency because writes can be queued and there are few restrictions on the execution of subsequent instructions; The processor can continue until the queue is full. For details on missed types, see Cache Performance Measurements and Metrics.