ESA-700 EPSD-0375-1108 contains only the code and data for the program

Most general-purpose cpus implement some form of virtual memory. In general, each program running on the machine sees its own simplified address space, which contains only the code and data for that program, or all programs run in a common virtual address space. Programs execute by calculating, comparing, reading, and writing to the addresses of their virtual address space rather than the addresses of their physical address space, making them simpler and thus easier to write.

Virtual memory requires the processor to translate virtual addresses generated by the program into physical addresses in main memory. The part of the processor that does this conversion is called the memory management Unit (MMU). The fast path through the MMU can be executed stored in the translation Reserve buffer (TLB), which is the operating system’s page table, segment table, or both.

For the purposes of the present discussion, address translation has three important characteristics:

Delay: Some time, possibly several cycles, after the virtual address is obtained from the address generator, the physical address can be obtained from the MMU.

Alias: Multiple virtual addresses can be mapped to one physical address. Most processors guarantee that all updates to that single physical address will occur programmatically. To achieve this guarantee, the processor must ensure that only one copy of the physical address resides in the cache at any given time.